#ifndef _PD_STATE_MACHINE_H_
#define _PD_STATE_MACHINE_H_

#include "typec_pd_config.h"
#include "hal_tcpc_operation.h"

enum pd_state_diagram {
    PD_PE_INVALID = 0,
    PD_PE_ERROR_RECOVERY,
    PD_PE_BIST_TEST_MODE,
    PD_PE_BIST_CARRIER_MODE,

    /* Source Port State Diagram */
    PD_PE_SRC_STARTUP,
    PD_PE_SRC_DISCOVERY,
    PD_PE_SRC_SEND_CAPABILITIES,
    PD_PE_SRC_NEGOTIATE_CAPABILITY,
    PD_PE_SRC_TRANSITION_SUPPLY1,
    PD_PE_SRC_TRANSITION_SUPPLY2,
    PD_PE_SRC_DISABLED,
    PD_PE_SRC_CAPABILITY_RESPONSE,
    PD_PE_SRC_WAIT_NEW_CAPABILITIES,
    PD_PE_SRC_SEND_SOFT_RESET,
    PD_PE_SRC_SOFT_RESET,
    PD_PE_SRC_HARD_RESET_RECEIVED,
    PD_PE_SRC_TRANSITION_TO_DEFAULT,
    PD_PE_SRC_HARD_RESET,
    PD_PE_SRC_READY,

    /* Sink Port State Diagram */
    PD_PE_SNK_STARTUP,
    PD_PE_SNK_DISCOVERY,
    PD_PE_SNK_WAIT_FOR_CAPABILITIES,
    PD_PE_SNK_EVALUATE_CAPABILITY,
    PD_PE_SNK_SELECT_CAPABILITY,
    PD_PE_SNK_TRANSITION_SINK,
    PD_PE_SNK_DISABLED,
    PD_PE_SNK_SEND_SOFT_RESET,
    PD_PE_SNK_SOFT_RESET,
    PD_PE_SNK_TRANSITION_TO_DEFAULT,
    PD_PE_SNK_HARD_RESET,
    PD_PE_SNK_READY,

    /* Exchange Message Diagram */
    PD_PE_GIVE_MANUFACTURER_INFO,
    PD_PE_GIVE_SINK_CAP,
    PD_PE_GIVE_SOURCE_CAP,
    PD_PE_GIVE_SINK_CAP_EXT,
    PD_PE_GIVE_SOURCE_CAP_EXT,
    PD_PE_GIVE_REVISION,
    PD_PE_GET_SINK_CAP,
    PD_PE_GET_SOURCE_CAP,
    PD_PE_CHUNK_RECEIVED,
    PD_PE_SEND_NOT_SUPPORTED,

    /* PR Swap State Diagram */
    PD_PE_PRS_SRC_SNK_EVALUATE_SWAP,
    PD_PE_PRS_SRC_SNK_REJECT_SWAP,
    PD_PE_PRS_SRC_SNK_ACCEPT_SWAP,
    PD_PE_PRS_SRC_SNK_SEND_SWAP,
    PD_PE_PRS_SRC_SNK_TRANSITION_TO_OFF,
    PD_PE_PRS_SRC_SNK_ASSERT_RD,
    PD_PE_PRS_SRC_SNK_WAIT_SOURCE_ON,
    PD_PE_PRS_SNK_SRC_EVALUATE_SWAP,
    PD_PE_PRS_SNK_SRC_REJECT_SWAP,
    PD_PE_PRS_SNK_SRC_ACCEPT_SWAP,
    PD_PE_PRS_SNK_SRC_SEND_SWAP,
    PD_PE_PRS_SNK_SRC_TRANSITION_TO_OFF,
    PD_PE_PRS_SNK_SRC_ASSERT_RP,
    PD_PE_PRS_SNK_SRC_SOURCE_ON,

    /* DR Swap State Diagram */
    PD_PE_DRS_DFP_UFP_EVALUATE_SWAP,
    PD_PE_DRS_DFP_UFP_REJECT_SWAP,
    PD_PE_DRS_DFP_UFP_ACCEPT_SWAP,
    PD_PE_DRS_DFP_UFP_SEND_SWAP,
    PD_PE_DRS_DFP_UFP_CHANGE_TO_UFP,
    PD_PE_DRS_UFP_DFP_EVALUATE_SWAP,
    PD_PE_DRS_UFP_DFP_REJECT_SWAP,
    PD_PE_DRS_UFP_DFP_ACCEPT_SWAP,
    PD_PE_DRS_UFP_DFP_SEND_SWAP,
    PD_PE_DRS_UFP_DFP_CHANGE_TO_DFP,

    /* VCONN Swap State Diagram */
    PD_PE_VCS_EVALUATE_SWAP,
    PD_PE_VCS_REJECT_VCONN_SWAP,
    PD_PE_VCS_ACCEPT_SWAP,
    PD_PE_VCS_TURN_ON_VCONN,
    PD_PE_VCS_SEND_PS_RDY,
    PD_PE_VCS_WAIT_FOR_VCONN,
    PD_PE_VCS_TURN_OFF_VCONN,

    /* VDM State Diagram */
    PD_PE_RESP_VDM_GET_IDENTITY,
    PD_PE_RESP_VDM_GET_IDENTITY_NAK,
    PD_PE_RESP_VDM_SEND_IDENTITY,
    PD_PE_INIT_PORT_VDM_IDENTITY_REQUEST,
    PD_PE_INIT_PORT_VDM_IDENTITY_ACKED,
    PD_PE_INIT_PORT_VDM_IDENTITY_NAKED,
    PD_PE_RESP_VDM_GET_SVIDS_NAK,
    PD_PE_RESP_VDM_GET_MODES_NAK,
    PD_PE_RESP_VDM_ENTER_MODE_NAK,
    PD_PE_RESP_VDM_EXIT_MODE_NAK,

    PD_PE_STATE_MAX,
};

enum pd_pe_event {
    PD_EVENT_NONE = 0,
    PD_EVENT_PROTO_RST_DONE,
    PD_EVENT_PROTO_TX_SUCC,
    PD_EVENT_PROTO_TX_FAILED,
    PD_EVENT_PROTO_TX_DISCARD,
    PD_EVENT_HARD_RST_COMPLETE,
    PD_EVENT_DPM_READY,
    PD_EVENT_DPM_ACCEPT,
    PD_EVENT_DPM_REJECT,
    PD_EVENT_VBUS_VSAFE5V,
    PD_EVENT_VBUS_VSAFE0V,
    PD_EVENT_CC_DETACH,
};

enum pd_protocol_tx_result {
    PD_PROTO_TX_SUCCESS = 0,
    PD_PROTO_TX_FAILED,
    PD_PROTO_TX_DISCARDED,
};

enum pd_protocol_tx_state_machine {
    PD_PRL_TX_WAIT_FOR_MESSAGE_REQUEST,
    PD_PRL_TX_MESSAGE_SENT,
    PD_PRL_TX_TRANSMISSION_ERROR,
};

enum pd_frame_type {
    FRAME_SOP = 0,
    FRAME_SOPP,
    FRAME_SOPPP,
    FRAME_SOP_DBGP,
    FRAME_SOP_DBGPP,
    FRAME_HARD_RESET,
    FRAME_CABLE_RESET,
    FRAME_BIST_CARRIER2,
};

enum msg_primary_type {
    MSG_TYPE_CONTROL = 1,
    MSG_TYPE_DATA,
    MSG_TYPE_EXTENDED,
};

enum msg_control_type {
    MSG_CTRL_GOODCRC = 1,
    MSG_CTRL_GOTOMIN,
    MSG_CTRL_ACCEPT,
    MSG_CTRL_REJECT,
    MSG_CTRL_PING,
    MSG_CTRL_PS_RDY,
    MSG_CTRL_GET_SOURCE_CAP,
    MSG_CTRL_GET_SINK_CAP,
    MSG_CTRL_DR_SWAP,
    MSG_CTRL_PR_SWAP,
    MSG_CTRL_VCONN_SWAP,
    MSG_CTRL_WAIT,
    MSG_CTRL_SOFT_RESET,
    MSG_CTRL_DATA_RESET,
    MSG_CTRL_DATA_RESET_COMPLETE,
    MSG_CTRL_NOT_SUPPORTED = 16,
    MSG_CTRL_GET_SOURCE_CAP_EXTENDED,
    MSG_CTRL_GET_STATUS,
    MSG_CTRL_FR_SWAP,
    MSG_CTRL_GET_PPS_STATUS,
    MSG_CTRL_GET_COUNTRY_CODES,
    MSG_CTRL_GET_SINK_CAP_EXTENDED,
    MSG_CTRL_GET_SOURCE_INFO,
    MSG_CTRL_GET_REVISION,
};

enum msg_data_type {
    MSG_DATA_SOURCE_CAPABILITIES = 1,
    MSG_DATA_REQUEST,
    MSG_DATA_BIST,
    MSG_DATA_SINK_CAPABILITIES,
    MSG_DATA_BATTERY_STATUS,
    MSG_DATA_ALERT,
    MSG_DATA_GET_COUNTRY_INFO,
    MSG_DATA_ENTER_USB,
    MSG_DATA_EPR_REQUEST,
    MSG_DATA_EPR_MODE,
    MSG_DATA_SOURCE_INFO,
    MSG_DATA_REVISION,
    MSG_DATA_VENDOR_DEFINED = 15,
};

enum msg_extended_type {
    MSG_EXT_SOURCE_CAPABILITIES_EXTENDED = 1,
    MSG_EXT_STATUS,
    MSG_EXT_GET_BATTERY_CAP,
    MSG_EXT_GET_BATTERY_STATUS,
    MSG_EXT_BATTERY_CAPABILITIES,
    MSG_EXT_GET_MANUFACTURER_INFO,
    MSG_EXT_MANUFACTURER_INFO,
    MSG_EXT_SECURITY_REQUEST,
    MSG_EXT_SECURITY_RESPONSE,
    MSG_EXT_FIRMWARE_UPDATE_REQUEST,
    MSG_EXT_FIRMWARE_UPDATE_RESPONSE,
    MSG_EXT_PPS_STATUS,
    MSG_EXT_COUNTRY_INFO,
    MSG_EXT_COUNTRY_CODES,
    MSG_EXT_SINK_CAPABILITIES_EXTENDED,
    MSG_EXT_EXTENDED_CONTROL = 16,
    MSG_EXT_EPR_SOURCE_CAPABILITIES,
    MSG_EXT_EPR_SINK_CAPABILITIES,
};

enum msg_vdm_cmd_type {
    MSG_DATA_VDM_CMD_TYPE_REQ,
    MSG_DATA_VDM_CMD_TYPE_ACK,
    MSG_DATA_VDM_CMD_TYPE_NAK,
    MSG_DATA_VDM_CMD_TYPE_BUSY,
};

enum msg_vdm_cmd {
    MSG_DATA_VDM_CMD_DISCOVER_ID = 1,
    MSG_DATA_VDM_CMD_DISCOVER_SVIDS,
    MSG_DATA_VDM_CMD_DISCOVER_MODES,
    MSG_DATA_VDM_CMD_ENTER_MODE,
    MSG_DATA_VDM_CMD_EXIT_MODE,
    MSG_DATA_VDM_CMD_ATTENTION,
};

enum pd_revision {
    PD_REVISION_10 = 0,
    PD_REVISION_20,
    PD_REVISION_3x,
};

enum pd_power_role {
    PD_POWER_ROLE_SNK,
    PD_POWER_ROLE_SRC,
};

enum pd_data_role {
    PD_DATA_ROLE_UFP,
    PD_DATA_ROLE_DFP,
};

enum pd_vconn_role {
    PD_VCONN_ROLE_NONE,
    PD_VCONN_ROLE_SRC,
};

#define PD_PROTO_SINK_TX_OK             TCPC_ROLE_CTRL_RP_3A
#define PD_PROTO_SINK_TX_NG             TCPC_ROLE_CTRL_RP_1A5

#define PD_MSG_TYPE(msg_type)           (((msg_type) >> 5) & 0x7)
#define PD_MSG_SUB_TYPE(msg_type)       ((msg_type)  & 0x1F)

#define PD_MSG_HEADER_EXT(header)       (((header) >> 15) & 0x1)
#define PD_MSG_HEADER_CNT(header)       (((header) >> 12) & 0x7)
#define PD_MSG_HEADER_ID(header)        (((header) >> 9) & 0x7)
#define PD_MSG_HEADER_PR(header)        (((header) >> 8) & 0x1)
#define PD_MSG_HEADER_REV(header)       (((header) >> 6) & 0x3)
#define PD_MSG_HEADER_DR(header)        (((header) >> 5) & 0x1)
#define PD_MSG_HEADER_TYPE(header)      ((header) & 0x1F)
#define PD_MSG_HEADER_SOP(ext, cnt, id, pr, rev, dr, msg_type)  \
                    (((ext) << 15) | ((cnt) << 12) | ((id) << 9) |\
                     ((pr) << 8) | ((rev) << 6) | ((dr) << 5) | (msg_type))
#define PD_MSG_EXTHEADER_CHUNK(ext_header)      (((ext_header) >> 15) & 0x1)
#define PD_MSG_EXTHEADER_CHUNKREQ(ext_header)   (((ext_header) >> 10) & 0x1)
#define PD_MSG_EXTHEADER_DATASIZE(ext_header)   ((ext_header) & 0x1FF)
#define PD_MSG_EXT_HEADER(chunk, chunk_no, req, size)               \
                    (((chunk) << 15) | (((chunk_no) & 0xF) << 11) | \
                     ((req) << 10) | ((size) & 0x1FF))

#define PD_MSG_PDO_TYPE_FIXED           (0U << 30)
#define PD_MSG_PDO_TYPE_BATT            (1U << 30)
#define PD_MSG_PDO_TYPE_VAR             (2U << 30)
#define PD_MSG_PDO_TYPE_APDO            (3U << 30)
#define PD_MSG_PDO_TYPE_MASK            GENMASK(31, 30)
#define PD_MSG_PDO_TYPE_APDO_SPR_PPS    (0U << 28)
#define PD_MSG_PDO_TYPE_APDO_EPR_AVS    (1U << 28)
#define PD_MSG_PDO_TYPE_APDO_SPR_AVS    (2U << 28)
#define PD_MSG_PDO_SUBTYPE_MASK         GENMASK(29, 28)
#define PD_MSG_PDO_TYPE_FIXED_RAW       0
#define PD_MSG_PDO_TYPE_BATT_RAW        1
#define PD_MSG_PDO_TYPE_VAR_RAW         2
#define PD_MSG_PDO_TYPE_APDO_RAW        3
#define PD_MSG_PDO_TYPE_APDO_SPR_PPS_RAW    0
#define PD_MSG_PDO_TYPE_APDO_EPR_AVS_RAW    1
#define PD_MSG_PDO_TYPE_APDO_SPR_AVS_RAW    2
#define PD_MSG_PDO_FIXED_DRP            (1 << 29)
#define PD_MSG_PDO_FIXED_SUSPEND        (1 << 28)  // SRC
#define PD_MSG_PDO_FIXED_HIGHER         (1 << 28)  // SNK
#define PD_MSG_PDO_FIXED_UNCONSTRAINED  (1 << 27)
#define PD_MSG_PDO_FIXED_COMM           (1 << 26)
#define PD_MSG_PDO_FIXED_DRD            (1 << 25)
#define PD_MSG_PDO_FIXED_UNCHUNK        (1 << 24)  // SRC
#define PD_MSG_PDO_FIXED_EPR            (1 << 23)  // SRC
#define PD_MSG_PDO_FIXED(mv, ma)        (((((mv) / 50) & 0x3FF) << 10) |\
                                        (((ma) / 10) & 0x3FF) |\
                                        PD_MSG_PDO_TYPE_FIXED)
#define PD_MSG_PDO_APDO_PPS(min_v, max_v, ma)       (((((max_v) / 100) & 0xFF) << 17) |\
                                                     ((((min_v) / 100) & 0xFF) << 8) |\
                                                     (((ma) / 50) & 0x7F))

#define PD_MSG_PDO_TYPE(pdo)            ((pdo) & PD_MSG_PDO_TYPE_MASK)
#define PD_MSG_PDO_TYPE_RAW(pdo)        (((pdo) & PD_MSG_PDO_TYPE_MASK) >> 30)
#define PD_MSG_PDO_SUBTYPE_RAW(pdo)     (((pdo) & PD_MSG_PDO_SUBTYPE_MASK) >> 28)
#define PD_MSG_PDO_FIXED_GET_CURR(pdo)  (((pdo) & 0x3FF) * 10)
#define PD_MSG_PDO_FIXED_GET_VOL(pdo)   ((((pdo) >> 10) & 0x3FF) * 50)

#define PD_MSG_PDO_PPS_GET_MAX_CURR(pdo)    ((((pdo) >> 0) & 0x7F) * 50)
#define PD_MSG_PDO_PPS_GET_MAX_VOL(pdo)     ((((pdo) >> 17) & 0xFF) * 100)
#define PD_MSG_PDO_PPS_GET_MIN_VOL(pdo)     ((((pdo) >> 8) & 0xFF) * 100)

#define PD_MSG_RDO_OBJ_POS(pos)         (((pos) & 0xF) << 28)
#define PD_MSG_RDO_CAP_MISMATCH         (1 << 26)
#define PD_MSG_RDO_USB_COMM             (1 << 25)
#define PD_MSG_RDO_NO_SUSPEND           (1 << 24)
#define PD_MSG_RDO_UNCHUNK_SUPPORT      (1 << 23)
#define PD_MSG_RDO_EPR_CAPABLE          (1 << 22)
#define PD_MSG_RDO_FIXED(pos, ma)       (PD_MSG_RDO_OBJ_POS(pos) |\
                                        ((((ma) / 10) & 0x3FF) << 10) |\
                                        ((((ma) / 10) & 0x3FF) << 0))
#define PD_MSG_RDO_SPR_PPS(pos, mv, ma) (PD_MSG_RDO_OBJ_POS(pos) |\
                                        ((((mv) / 20) & 0xFFF) << 9) |\
                                        ((((ma) / 50) & 0x7F) << 0))
#define PD_MSG_RDO_OBJ_POS_RAW(rdo)     (((rdo) >> 28) & 0xF)
#define PD_MSG_RDO_FIXED_GET_CURR(rdo)  (((rdo) & 0x3FF) * 10)
#define PD_MSG_RDO_CAP_MISMATCH_RAW(rdo)    (((rdo) >> 26) & 0x1)

#define PD_MSG_VDO_VID(vdo)             (((vdo) >> 16) & 0xFFFF)
#define PD_MSG_VDO_SVDM(vdo)            (((vdo) >> 15) & 1)
#define PD_MSG_VDO_VER_MAJOR(vdo)       (((vdo) >> 13) & 0x3)
#define PD_MSG_VDO_VER_MINOR(vdo)       (((vdo) >> 11) & 0x3)
#define PD_MSG_VDO_OPJ_POS(vdo)         (((vdo) >> 8) & 0x7)
#define PD_MSG_VDO_CMD_TYPE(vdo)        (((vdo) >> 6) & 0x3)
#define PD_MSG_VDO_CMD(vdo)             ((vdo) & 0x1F)
#define VDM_VERSION_MAJOR_10            0
#define VDM_VERSION_MAJOR_2x            1
#define VDM_VERSION_MINOR_20            0
#define VDM_VERSION_MINOR_21            1
#define PD_MSG_VDO_SVDM_HEADER(svid, major, minor, obj_pos, cmdt, cmd)              \
                        ((svid << 16) | (1 << 15) | (((major) & 0x3) << 13)  \
                        | (((minor) & 0x3) << 11) | (((obj_pos) & 0x7) << 8)    \
                        | (((cmdt) & 0x3) << 6) | ((cmd) & 0x1F))
#define VDM_IDH_USB_HOST                1
#define VDM_IDH_NO_USB_HOST             0
#define VDM_IDH_USB_DEVICE              1
#define VDM_IDH_NO_USB_DEVICE           0
#define VDM_IDH_UFPTYPE_NOT_UFP         0
#define VDM_IDH_UFPTYPE_USBHUB          1
#define VDM_IDH_UFPTYPE_USBPERI         2
#define VDM_IDH_UFPTYPE_PSD             3
#define VDM_IDH_MODAL_OP_SUPPORT        1
#define VDM_IDH_MODAL_OP_NOT_SUPPORT    0
#define VDM_IDH_DFPTYPE_NOT_DFP         0
#define VDM_IDH_DFPTYPE_USBHUSB         1
#define VDM_IDH_DFPTYPE_USBHOST         2
#define VDM_IDH_DFPTYPE_POWERBRICK      3
#define VDM_IDH_CONNTYPE_RECEPTACLE     2
#define VDM_IDH_CONNTYPE_PLUG           3
#define VDM_IDH_USB_VENDOR_ID           0x377E
#define PD_MSG_VDO_IDH(usbh, usbd, ptype, modal, ptype_dfp, conn_type, vid)         \
                        (((usbh) << 31) | ((usbd) << 30) | (((ptype) & 0x7) << 27)  \
                        | (((ptype_dfp) & 0x7) << 23) | ((modal) << 26)             \
                        | (((conn_type) & 0x3) << 21) | ((vid) & 0xffff))
#define PD_MSG_VDO_IDH20(usbh, usbd, ptype, modal, vid)                             \
                        (((usbh) << 31) | ((usbd) << 30) | (((ptype) & 0x7) << 27)  \
                        | ((modal) << 26) | ((vid) & 0xffff))
#define PD_MSG_VDO_CSTAT(xid)           ((xid) & 0xFFFFFFFF)
#define VDM_PRODUCT_PID                 0x0548
#define VDM_PRODUCT_BCDDEVICE           0
#define PD_MSG_VDO_PRODUCT(pid, bcd)    ((((pid) & 0xffff) << 16) | ((bcd) & 0xffff))
#define PD_MSG_VDO_UFP(cap, vconn, vcreq, vbusreq, alt, usbs)                           \
                       ((0x3 << 29) | (((cap) & 0xF) << 24) | (((vconn) & 0x7) << 8)   \
                       | (((vcreq) & 0x1) << 7) | (((vbusreq) & 0x1) << 6)              \
                       | (((alt) & 0x7) << 3) | ((usbs) & 0x7))
#define PD_MSG_VDO_DFP(cap, port_no)    ((0x2 << 29) | (((cap) & 0x7) << 24) | ((port_no) & 0x1F))

#define PD_MSG_RMDO(rev_major, rev_minor, ver_major, ver_minor)                     \
                        ((((rev_major) & 0xF) << 28) | (((rev_minor) & 0xF) << 24)   \
                        | (((ver_major) & 0xF) << 20) | (((ver_minor) & 0xF) << 16))

#define PD_DPM_POLICY_PFEFER_DFP        BIT(0)
#define PD_DPM_POLICY_PFEFER_UFP        BIT(1)
#define PD_DPM_POLICY_PFEFER_SRC        BIT(2)
#define PD_DPM_POLICY_PFEFER_SNK        BIT(3)

#define PD_DPM_REACTIONS_REQUEST_DRS    BIT(0)
#define PD_DPM_REACTIONS_REQUEST_PRS    BIT(1)
#define PD_DPM_REACTIONS_REQUEST_VCS    BIT(2)
#define PD_DPM_REACTIONS_GET_SNK_CAP    BIT(3)
#define PD_DPM_REACTIONS_GET_SRC_CAP    BIT(4)
#define PD_DPM_REACTIONS_DISCOVER_ID    BIT(5)
#define PD_DPM_REACTIONS_POWER_REQUEST  BIT(6)

struct dpm_rdo_info {
    uint8_t pos;
    uint8_t type;
    bool mismatch;
    uint32_t out_vol;
    uint32_t op_curr;
};

#pragma pack(push, 1)
struct pd_msg_src_caps_ext {
    uint16_t ext_header;
    uint16_t vid;
    uint16_t pid;
    uint32_t xid;
    uint8_t fw_ver;
    uint8_t hw_ver;
    uint8_t vol_reg;
    uint8_t holdup;
    uint8_t compliance;
    uint8_t touch_curr;
    uint16_t peak_curr1;
    uint16_t peak_curr2;
    uint16_t peak_curr3;
    uint8_t touch_temp;
    uint8_t src_input;
    uint8_t slot_no;
    uint8_t spr_pdp;
    uint8_t epr_pdp;
};

struct pd_msg_snk_caps_ext {
    uint16_t ext_header;
    uint16_t vid;
    uint16_t pid;
    uint32_t xid;
    uint8_t fw_ver;
    uint8_t hw_ver;
    uint8_t skedb_ver;
    uint8_t load_step;
    uint16_t sink_load;
    uint8_t compliance;
    uint8_t touch_temp;
    uint8_t bat_info;
    uint8_t sink_modes;
    uint8_t spr_min_pdp;
    uint8_t spr_op_pdp;
    uint8_t spr_max_pdp;
    uint8_t epr_min_pdp;
    uint8_t epr_op_pdp;
    uint8_t epr_max_pdp;
};

struct pd_msg_manufacturer_info {
    uint16_t ext_header;
    uint16_t vid;
    uint16_t pid;
    char manu_str[22];
};
#pragma pack(pop)

void pd_port_init(void);
void pd_main_task(void);
void pd_dpm_reactions_set(uint32_t flag);
void pd_dpm_reactions_clear(uint32_t flag);
void msg_rx_fifo_init(void);
void pd_dpm_main_task(void);
#endif

